1. Field of the Invention
The present invention relates to a method for heat-treating silicon wafers and to silicon wafers.
2. Background Art
A surface layer portion of a silicon wafer sometimes contains oxygen precipitates and crystal defects having a regular octahedral structure known as crystal originated particles (COP) which are introduced into a crystal during pulling of a silicon single-crystal ingot. When present in the surface layer portion of the wafer where devices are fabricated, these defects cause a deterioration in the gate oxide integrity and other electrical characteristics.
Therefore, in order to improve the gate oxide integrity and other electrical characteristics of the silicon wafer, it is essential for the surface layer portion of the wafer where devices are fabricated to be made a defect-free layer. Numerous reports (e.g., Patent Documents 1 to 5) indicate that in order to form a defect-free layer in a surface layer portion of a silicon wafer and thus improve the gate oxide integrity, it is effective to subject the silicon wafer to a high-temperature heat treatment in an ambient atmosphere of hydrogen, argon, or a gas mixture thereof for several hours.
As disclosed in Patent Document 3 and Patent Document 4, temperature processes in such high-temperature heat treatment typically involve a heat-up process in which a temperature is raised from a wafer loading temperature to 1000° C. at a rate of about 10° C./min and is raised from 1000 to 1200° C. at a rate of 3° C./min or less, a heat treatment which is carried out at about 1200° C. for one hour or more, and a ramp-down process in which the temperature is lowered from 1200° C. to about 1000° C. at a rate of 3° C./min and is lowered at 1000° C. or below at a rate of 10° C./min.
In the ramp-down process, the reason for setting a ramp-down rate to 3° C./min within a temperature range of 1200 to 1000° C. is to allow oxygen precipitates to form in the wafer by lowering the ramp-down rate in this temperature range. The reason for setting the ramp-down rate to 10° C./min within a temperature range of 1000° C. or below is to increase throughput and reduce production costs by raising the ramp-down rate.
In a high-temperature heat treatment in a hydrogen gas-containing ambient atmosphere, it is well-known that a reducing action of the hydrogen gas etches surfaces of a quartz reaction tube and a wafer boat (which is made of quartz, silicon or SiC), thereby, during the heat treatment, a silicon wafer surface is contaminated with impurities present in a parent material, especially heavy metals such as iron, copper and nickel.
There is no effective means for removing heavy metal impurities once they have diffused to the wafer surface as a result of the high-temperature heat treatment. Hence, there exists a need for a method for heat-treating a silicon wafer which does not give rise to heavy metal contamination. Recently, a high-temperature heat treatment in an ambient atmosphere of argon gas which does not have a reducing effect has been regarded as promising.
However, in our own experiments, we have found that iron concentrations (iron contamination) in a silicon wafer surface were higher than those prior to a high-temperature heat treatment, not only in silicon wafers subjected to a high-temperature heat treatment in a hydrogen-containing ambient atmosphere, but also even in silicon wafers subjected to a high-temperature heat treatment in an ambient atmosphere of argon gas or an ambient atmosphere of argon gas containing a small amount of hydrogen gas mixed therein.
Patent Document 1: Japanese Examined Patent Application, Second Publication No. H05-18254
Patent Document 2: Japanese Patent No. 3080501
Patent Document 3: Japanese Patent Application, First Publication No. H06-295913
Patent Document 4: Japanese Patent Application, First Publication No. H10-144698
Patent Document 5: Japanese Patent Application, First Publication No. 2000-58552